No explanation was found for the excessive noise. Three different TLC2201 chips were tried. All showed similar high noise.
The circuit was changed to use a LT1464 op amp. This op amp has a higher voltage noise specification but gave a much lower noise level in this circuit.
The LT1464 circuit's measured output noise spectrum is only about 15% higher at 1KHz than the theoretical model for resistor thermal noise alone (red line). Adding the LT1464's 24nV/sqrt(Hz) input voltage noise to the model (green line) matches even more closely.
An OPA124 op amp was tried to see if the op amp input noise voltage contribution could be reduced. The OPA124 input voltage noise spec is 8nV/sqrt(Hz) (similar to the original TLC2201). The OPA124 power requirements are much higher so some reduction in power supply filtering was done to be able to try this chip. This chip was prone to oscillations and wasn't stable with a +3V common mode. It did run with the non-inverting input tied to ground. The noise spectrum in this configuration was reasonable but showed no improvement over the LT1464. Slightly more noise is seen especially at the higher frequncies. This may have been due to a the decreased power supply filtering although theoretically the power supply rejection should have been more than adequate.
The rms noise was measured by sampling the output (with no input signal) at 2Khz and subtracting consecutive samples. In flight, the dust signal will be modulated at 1Khz and the output will be sampled on each phase. Subtracting the samples will give the dust current at a sample rate of 1KHz. The total noise in the deltas was .29pA rms. The output noise in pA was calculated using the nominal gain of the amplifier (0.43 V/pA).
Gain is determined by the 2 Gigohm resistor (10% tolerance) and the 1% resistors in the other amplifier stages. The preamp converts 1pA to 2mV (1pA * 2G). The amplifier stage has a voltage gain of 304. The 3db frequency cutoff of the system is 1KHz so gain at 1Khz is down by 0.707.
1pA * 2Gohm * 304 * .707 = 0.430 Volts
Calibrations with a test inject capacitor confirm that the system gain is close to nominal but the exact value of the test inject capacitor (approx 0.3pF) isn't known to better than 10%.
Output samples are averaged to reduce the noise. The there is a direct trade-off between noise and time resolution. An 8 sample average reduced the noise to .1 pA and gives a time resolution of 8msec. Note that noise was reduced by sqrt(n) as expected for random noise.
The stray capacitance of the layout can just barely be kept low enough to raise the cutoff frequency to 1KHz with the 2 Gigohm feedback resistor. This means there isn't much more that can be done to improve the signal to noise ratio at 1KHz.
The 8ms average compares to the basic sample rate of the SAL detector. The dart prototype noise level looks at least a factor of 20 times better than SAL. The acceptance area is only about 5.5 square cm compared to the 35 square cm but that still gives a net improvement of a factor of 3.
Some crude temperature checks were run. The setup did not control or indicate the temperature of the circuit very accurately but the tests give some indications as to how severe temperature affects will be.
The major concern is op amp bias current. It is not a factor at 25C but increases exponentially with temperature. In fact the DC offset gave the best indication of actual temperature of the op amp. Temperature was calculated by matching up an exponential bias current variation with a few points of measured air temperature near the preamp board. Bias spec is 1pA (typ) at 25C. Measured output offset at 25C is 3.030 Volts. Output voltage changes by 2mV/pA.
degF = log(v-3.033)*36+174
The high gain dust channel is AC coupled so increasing the DC offset does not directly affect it. The increased bias current does cause more current noise.
The increase in the noise spectrum seen at 50C matches fairly well with a 25pA bias model (blue line).
The total noise (for 1Ksamp deltas) increases to about .34pA rms at 50C. A 17% increase.
A temperature drift in the bias current affects the center voltage for the high gain channel.
The shift in offset is more dependent on the rate of change of temperature rather than the value. The shift is caused mostly by coupling through of the time changing "DC" offset. The effect is worse at higher tempertures because the "DC" offset is changing exponentially with temperature. The amplifier low frequency cutoff could be raised to decrease this effect but that sacrifices some information about dust polarity. A shift in center voltage decreases the dynamic range that can be handled without getting clipped. A 0.25V shift is only 10% loss in dynamic range but a shift of a volt or more might be something to worry about.
It looks like we would like to see the temperature stay below 50C and the rate of change below 3 deg C/min.