7402  
This device contains four independent gates
each of which performs the logic NOR function.
Data Sheet: http://www.fairchildsemi.com/ds/DM/DM7402.pdf

7404  
This device contains six independent gates
each of which performs the logic INVERT function.
Data Sheet: http://www.fairchildsemi.com/ds/DM/DM7404.pdf

7408  
This device contains four independent gates
each of which performs the logic AND function.
Data Sheet: http://www.fairchildsemi.com/ds/DM/DM7408.pdf

7410  
This device contains three independent gates
each of which performs the logic NAND function.
Data Sheet: http://www.fairchildsemi.com/ds/DM/DM74LS10.pdf

7411  
This device contains three independent gates
each of which performs the logic AND function.
Data Sheet: http://www.fairchildsemi.com/ds/DM/DM74LS11.pdf

7432  
This device contains four independent gates
each of which performs the logic OR function.
Data Sheet: http://www.fairchildsemi.com/ds/DM/DM74LS32.pdf

7486  
This device contains four independent gates
each of which performs the logic exclusive-OR function.
Data Sheet: http://www.fairchildsemi.com/ds/DM/DM7486.pdf

74175  
This device contains four flip-flops with double-rail outputs
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the quad (175) versions feature complementary outputs from each flip-flop.
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output.
Data Sheet: http://www.fairchildsemi.com/ds/DM/DM74LS175.pdf

Adam's Note:
When you become engineers remember; Fairchild Semiconductors helped you along the way.